Espressif Systems /ESP32-S2 /RTC_CNTL /INT_ST_RTC

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Interpret as INT_ST_RTC

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SLP_WAKEUP_INT_ST)SLP_WAKEUP_INT_ST 0 (SLP_REJECT_INT_ST)SLP_REJECT_INT_ST 0 (SDIO_IDLE_INT_ST)SDIO_IDLE_INT_ST 0 (WDT_INT_ST)WDT_INT_ST 0 (TOUCH_SCAN_DONE_INT_ST)TOUCH_SCAN_DONE_INT_ST 0 (ULP_CP_INT_ST)ULP_CP_INT_ST 0 (TOUCH_DONE_INT_ST)TOUCH_DONE_INT_ST 0 (TOUCH_ACTIVE_INT_ST)TOUCH_ACTIVE_INT_ST 0 (TOUCH_INACTIVE_INT_ST)TOUCH_INACTIVE_INT_ST 0 (BROWN_OUT_INT_ST)BROWN_OUT_INT_ST 0 (MAIN_TIMER_INT_ST)MAIN_TIMER_INT_ST 0 (SARADC1_INT_ST)SARADC1_INT_ST 0 (TSENS_INT_ST)TSENS_INT_ST 0 (COCPU_INT_ST)COCPU_INT_ST 0 (SARADC2_INT_ST)SARADC2_INT_ST 0 (SWD_INT_ST)SWD_INT_ST 0 (XTAL32K_DEAD_INT_ST)XTAL32K_DEAD_INT_ST 0 (COCPU_TRAP_INT_ST)COCPU_TRAP_INT_ST 0 (TOUCH_TIMEOUT_INT_ST)TOUCH_TIMEOUT_INT_ST 0 (GLITCH_DET_INT_ST)GLITCH_DET_INT_ST

Description

RTC interrupt state register

Fields

SLP_WAKEUP_INT_ST

Stores the status of the interrupt triggered when the chip wakes up from sleep.

SLP_REJECT_INT_ST

Stores the status of the interrupt triggered when the chip rejects to go to sleep.

SDIO_IDLE_INT_ST

Stores the status of the interrupt triggered when the SDIO idles.

WDT_INT_ST

Stores the status of the RTC watchdog interrupt.

TOUCH_SCAN_DONE_INT_ST

Stores the status of the interrupt triggered upon the completion of a touch scanning.

ULP_CP_INT_ST

Stores the status of the ULP co-processor interrupt.

TOUCH_DONE_INT_ST

Stores the status of the interrupt triggered upon the completion of a single touch.

TOUCH_ACTIVE_INT_ST

Stores the status of the interrupt triggered when a touch is detected.

TOUCH_INACTIVE_INT_ST

Stores the status of the interrupt triggered when a touch is released.

BROWN_OUT_INT_ST

Stores the status of the brown out interrupt.

MAIN_TIMER_INT_ST

Stores the status of the RTC main timer interrupt.

SARADC1_INT_ST

Stores the status of the SAR ADC 1 interrupt.

TSENS_INT_ST

Stores the status of the touch sensor interrupt.

COCPU_INT_ST

Stores the status of the ULP-RISCV interrupt.

SARADC2_INT_ST

Stores the status of the SAR ADC 2 interrupt.

SWD_INT_ST

Stores the status of the super watchdog interrupt.

XTAL32K_DEAD_INT_ST

Stores the status of the interrupt triggered when the 32 kHz crystal is dead.

COCPU_TRAP_INT_ST

Stores the status of the interrupt triggered when the ULP-RISCV is trapped.

TOUCH_TIMEOUT_INT_ST

Stores the status of the interrupt triggered when touch sensor times out.

GLITCH_DET_INT_ST

Stores the status of the interrupt triggered when a glitch is detected.

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